Register Files (RF), Read Only Memories (ROMs) and Content Addressable Memories (CAMs) usage is increasing rapidly in modern microprocessor and SoC (System-on-Chip) designs due to their energy efficient local storage/access to feed various compute blocks such as Arithmetic Logic Unit (ALU), accelerators, graphics execution units, etc. Supply voltage scaling, which is an effective knob for improving energy efficiency, is governed by the memory array VMIN or the data path logic VMIN. Here, the term “VMIN” or “minimum operating voltage” generally refers to the lowest operating voltage level below which the memory will lose its data. Lowering the VMIN for memory (when that VMIN is the limiter) and/or reducing memory dynamic power at ISO-VMIN (when the VMIN of the logic is the limiter) is preferred for improved energy efficiency of the entire design. Addressing aging concerns of memories is also challenging in view of lowering VMIN.